This invention relates to an oscillator circuit comprising an oscillating stage and an output stage, the oscillating stage being coupled to an input of the output stage for feeding an input signal combining a generated oscillating signal with a first DC bias, said first DC bias being dependent on the amplitude of the oscillating signal, the output stage comprising
a series arrangement of main current channels of a first and a second output transistor of complementary conductivity types, coupled between a first and a second supply terminal PA0 the input being coupled to a control electrode of the first transistor and, via a capacitor, to a control electrode of the second transistor, PA0 a node in the series arrangement between the first and the second transistor being coupled to an output of the oscillator circuit, the output stage, in operation, driving an output voltage to switch substantially between a first and a second output level when the input signal crosses an input switching level.
Such an oscillator circuit is known from JP 55-8160.
The oscillating stage is conveniently used to generate both the oscillating signal and the first DC bias for driving the output stage. For example, as in JP 55-8160, the oscillating stage usually comprises a feedback loop including the control electrode of a transistor similar to that of the first transistor. The control voltage of this transistor is used to apply the first DC bias as well as the oscillating signal in the form of the input signal to the output stage.
In general, the oscillating signal produced by the oscillating stage will not be binary but, for example, sine-shaped when the control electrode of the transistor in the oscillating stage receives its signal via a frequency-selective network as in JP 55-8160. Moreover, the oscillating signal will have an amplitude which may depend on partially uncontrollable factors like IC processing parameters or ambient temperature.
The purpose of the output stage is to derive a substantially binary output signal from the oscillating signal. In operation, the output stage will drive the output voltage from the first level, which is close to the supply voltage at the first supply terminal, to the second level, which is close to the supply voltage at the second supply terminal, and back.
An important property of the output signal is its duty cycle, i.e., the percentage of time during which it is at the first level. For many applications the duty cycle should be fixed at 50%. However, the duty cycle is affected by the relative positions of the first DC bias and the switching level. For example, if the first DC bias is lowered with respect to the switching level, a sine-shaped input signal will be above the switching level for a shorter time, causing a lower duty cycle.
The problem of providing a DC bias as well as an oscillating signal from the oscillating stage is thus that non-linearities in the transistor in the feedback loop will usually cause the amplitude of the oscillating signal to influence the first DC bias level generated in the oscillating stage. Consequently, the known oscillator circuit has the drawback that the duty cycle will be influenced by the amplitude. Since the exact amplitude of the oscillating signal depends on partially uncontrollable factors, this means that the duty cycle will also be partially uncontrolled.